This invention pertains to progress in the field of very high-speed solid-state data storage technologies for modern computer systems.
A somewhat theoretical introduction to this invention can be found in the above article which the Inventor authored with the title: “Overclocking Data Storage Subsystems: One Approach to Variable Channel Bandwidth”.
In the latter article, see FIG. 3 in particular.
A copy of that article is formally incorporated with this utility patent application, in both hard copy and electronic (.pdf) formats.
The use of Random Access Memory (“RAM”) in prior devices previously developed and sold by foreign companies, primarily in Taiwan, were deficient for several reasons including, but not limited to:
    (a) use of full-sized dual in-line memory modules (“DIMM”) instead of small outline dual in-line memory modules (“SO-DIMM”);    (b) use of obsolete double data rate versions 1 and 2 (“DDR” and “DDR2” respectively) instead of modern DDR3 RAM;    (c) use of obsolete transmission rates of 150 and 300 Megabytes per second (“MBps”), instead of the current standard of 600 MBps;    (d) no means to increase transmission rates above 600 MBps;    (e) absence of any means to replace the 8-bit/10-bit (“8 b/10 b”) legacy frame with the 128 b/130 b “jumbo frame” now found in the technical specifications for PCI-Express 3.0 as published in November 2010.